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Submitted by huanbk05 on Mon, 01/25/2010 - 17:38 Hello, I'm trying to compare between CCS and vissim about memory to be used on DSP after compiler program. example: my program is control open loop AC motor use V/f, and i see %CPU usage. now i want to see how much ram memory on dsp is used.
Hi everybody, I have problems reaching a feasible design at the last stage of the ply optimization. I am trying to minimize the displacement during the shuffling of the plys. After the first iteration the solver stops without a message in the Message log, if it is feasible or infeasible. Did anybody had the same problem or can help me with this topic Kind regards Dean